{"id":115,"date":"2012-05-24T08:56:04","date_gmt":"2012-05-24T08:56:04","guid":{"rendered":"http:\/\/www.electronic-products-development.com\/?p=115"},"modified":"2022-02-18T15:37:50","modified_gmt":"2022-02-18T15:37:50","slug":"oscillator-setup","status":"publish","type":"post","link":"https:\/\/ibex.tech\/embedded\/microchip\/pic32\/xc32-v2-old\/oscillator\/oscillator-setup","title":{"rendered":"Oscillator Configuration"},"content":{"rendered":"<h4>\nTypical fastest setup (80MHz with 1x divide, 20x multiply, 2 x divide)<br \/>\n<\/h4>\n<p>\nUsing an&nbsp;8MHz crystal\n<\/p>\n<pre>\r\n<code>\r\n#pragma config FPLLIDIV = DIV_2 \/\/PLL Input Divider (Must produce 4-5MHz from crystal frequency)\r\n#pragma config FPLLODIV = DIV_1 \/\/PLL Output Divider\r\n#pragma config FPLLMUL = MUL_20 \/\/PLL Multiplier\r\n\r\n\/\/SYSTEMConfigPerformance(80000000ul); \/\/Note this sets peripheral bus to &#39;1&#39; max speed (regardless of configuration bit setting) \/\/Use PBCLK divider of 1:1 to calculate UART baud, timer tick etc\r\n<\/code><\/pre>\n<h4>\nReduced speed of 40MHz to reduce power consumption (40MHz with 2 x divide, 20x multiply, 2 x divide)<br \/>\n<\/h4>\n<pre>\r\n<code>\r\n#pragma config FPLLIDIV = DIV_2 \/\/PLL Input Divider (Must produce 4-5MHz from crystal frequency)\r\n#pragma config FPLLODIV = DIV_2 \/\/PLL Output Divider\r\n#pragma config FPLLMUL = MUL_20 \/\/PLL Multiplier\r\n\r\nSYSTEMConfigPerformance(40000000ul); \/\/&lt;&lt;<reduced application=\"\" code=\"\" consumption=\"\" for=\"\" power=\"\" reduce=\"\" speed=\"\" this=\"\" to=\"\"><\/reduced><\/code><\/pre>\n<h4>\nReduced speed of 20MHz to reduce power consumption (20MHz with 2x divide, 20x multiply, 4 x divide)<br \/>\n<\/h4>\n<pre>\r\n<code>\r\n\t#pragma config FPLLIDIV = DIV_2\t\t\t\/\/PLL Input Divider\r\n\t#pragma config FPLLODIV = DIV_4\t\t\t\/\/PLL Output Divider\r\n\t#pragma config FPLLMUL = MUL_20\t\t\t\/\/PLL Multiplier\r\n\r\n\tSYSTEMConfigPerformance(20000000L);\t\t\/\/Note this sets peripheral bus to &#39;1&#39; max speed (regardless of configuration bit setting)\r\n<\/code><\/pre>\n<p>\n&nbsp;\n<\/p>\n<p>\n&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Typical fastest setup (80MHz with 1x divide, 20x multiply, 2 x divide) Using an&nbsp;8MHz crystal #pragma config FPLLIDIV = DIV_2 \/\/PLL Input Divider (Must produce 4-5MHz from crystal frequency) #pragma config FPLLODIV = DIV_1 \/\/PLL Output Divider #pragma config FPLLMUL = MUL_20 \/\/PLL Multiplier \/\/SYSTEMConfigPerformance(80000000ul); \/\/Note this sets peripheral bus to &#39;1&#39; max speed (regardless [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[71],"tags":[],"class_list":["post-115","post","type-post","status-publish","format-standard","hentry","category-oscillator"],"_links":{"self":[{"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/posts\/115","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/comments?post=115"}],"version-history":[{"count":11,"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/posts\/115\/revisions"}],"predecessor-version":[{"id":858,"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/posts\/115\/revisions\/858"}],"wp:attachment":[{"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/media?parent=115"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/categories?post=115"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/tags?post=115"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}