{"id":1574,"date":"2024-07-19T12:14:03","date_gmt":"2024-07-19T11:14:03","guid":{"rendered":"https:\/\/ibex.tech\/embedded\/?p=1574"},"modified":"2024-07-19T12:16:34","modified_gmt":"2024-07-19T11:16:34","slug":"tmr-using-mcc-2","status":"publish","type":"post","link":"https:\/\/ibex.tech\/embedded\/microchip\/pic18\/xc8-compiler\/timers-and-delays-xc8-compiler\/tmr-using-mcc-2","title":{"rendered":"TMR (using MCC)"},"content":{"rendered":"\n<h4 class=\"wp-block-heading\">TMR0 &#8211; IRQ<\/h4>\n\n\n\n<p>This example modifies TMR0 in the IRQ to obtain a roll over every 1mS.  You could use a timer with a prescaller for this, but in this example we show how it&#8217;s possible on TMR0 with no prescaller (leaving your prescaller timers available for other uses)<\/p>\n\n\n\n<h5 class=\"wp-block-heading\">Using your own irq function<\/h5>\n\n\n\n<pre class=\"wp-block-code\"><code>#include \"mcc_generated_files\/timer\/tmr0.h\"\n\n\t\/\/----- SET ADDRESS OF OUR INTERRUPT HANDLERS -----\n\tTimer0_OverflowCallbackRegister(Our_TMR0_InterruptHandler);\n\n\tTimer0_Start();\n\n\n\/\/Inline assembler access bank variables\n__near static unsigned char uc_asm_irq_temp;\t\t\/\/ near qualifier specifies access RAM\n__near static unsigned char uc_asm_irq_temp1;\n\n\/\/***********************************************\n\/\/***********************************************\n\/\/********** TIMER 0 INTERRUPT HANDLER **********\n\/\/***********************************************\n\/\/***********************************************\nvoid Our_TMR0_InterruptHandler(void)\n{\n\t\/\/(Timer 0 - Heartbeat every 1mS)\n\t\n\t\/\/Modify TMR0 value so we roll over every 1mS\n\tasm(\"GLOBAL _uc_asm_irq_temp\");\n\tasm(\"GLOBAL _uc_asm_irq_temp1\");\n\t\/\/Reset timer for next rollover\n\tasm(\"movff\tTMR0L,_uc_asm_irq_temp\");\t\t\/\/read_current_timer_value (read low byte loads high byte)\n\tasm(\"movff\tTMR0H,_uc_asm_irq_temp1\");\n\tasm(\"movlw\t0x6b\");\n\tasm(\"addwf\t_uc_asm_irq_temp,f,c\");\t\t\t\/\/(1 = file register, 0 = access ram)\n\tasm(\"movlw\t0xf0\");\n\tasm(\"addwfc\t_uc_asm_irq_temp1,f,c\");\t\t\/\/(1 = file register, 0 = access ram)\n\tasm(\"movff\t_uc_asm_irq_temp1,TMR0H\");\t\t\/\/Store new value (high byte first)\n\tasm(\"movff\t_uc_asm_irq_temp,TMR0L\");\n\n\t\/\/This code takes 10 instruction cycles\n\t\/\/The timer is inhibited for 2 instruction cycles after the low byte is written\n\t\/\/Therefore subtract 12 from the value to be written\n\t\/\/For 4MHz clock 1mS irq = 1000 cycles.  Minus 12 = 988.  0xFFFF - 988 = 0xFC23\n\t\/\/For 4MHz clock 10mS irq = 10000 cycles.  Minus 12 = 988.  0xFFFF - 988 = 0xd8fb\n\t\/\/For 16MHz clock 1mS irq = 4000 cycles.  Minus 12 = 3988.  0xFFFF - 3988 = 0xF06B\n\t\/\/For 16MHz clock 10mS irq = 40000 cycles.  Minus 12 = 39988.  0xFFFF - 39988 = 0x63CB\n\t\/\/For 32MHz clock 1mS irq = 8000 cycles.  Minus 12 = 7988.  0xFFFF - 7988 = 0xE0CB\n\t\/\/For 40MHz clock 10mS irq = 50000 cycles (1:2).  Minus 12 = 49988.  0xFFFF - 49988 = 0x3cbb\n\t\/\/For 40MHz clock 1mS irq = 10000 cycles.  Minus 12 = 9988.  0xFFFF - 9988 = 0xd8fb\n\n}<\/code><\/pre>\n","protected":false},"excerpt":{"rendered":"<p>TMR0 &#8211; IRQ This example modifies TMR0 in the IRQ to obtain a roll over every 1mS. You could use a timer with a prescaller for this, but in this example we show how it&#8217;s possible on TMR0 with no prescaller (leaving your prescaller timers available for other uses) Using your own irq function<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[131,70],"tags":[],"class_list":["post-1574","post","type-post","status-publish","format-standard","hentry","category-pic18-peripherals","category-timers-and-delays-xc8-compiler"],"_links":{"self":[{"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/posts\/1574","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/comments?post=1574"}],"version-history":[{"count":2,"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/posts\/1574\/revisions"}],"predecessor-version":[{"id":1576,"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/posts\/1574\/revisions\/1576"}],"wp:attachment":[{"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/media?parent=1574"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/categories?post=1574"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ibex.tech\/embedded\/wp-json\/wp\/v2\/tags?post=1574"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}