Collector-Emitter Sustaining Voltage

Transistors are often specified with two collector-emitter max voltages:

  • (Vces) collector-emitter voltage (Vbe=0V)
  • (Vceo) collector-emitter voltage (Ib=0A)

Vceo(sus) is the Collector-Emitter Sustaining Voltage and its confusing. It’s basically the the collector-emitter breakdown voltage with the base open circuit, which is the most vulnerable state for a transistor. This diagram from Electrical Ratings and Characteristics of Power Semiconductor Switching Devices gives a good explanation of what’s at play:

Vceo is the left most line, demonstrating the maximum voltage before the transistor will breakdown with the base floating.

If your transistor base won’t ever be floating, then this specification is not a limiting factor for you and your breakdown voltage will be based on one of the lines to the right of it (with the typical Vces specification being the 3rd line).

USEFUL?
We benefit hugely from resources on the web so we decided we should try and give back some of our knowledge and resources to the community by opening up many of our company’s internal notes and libraries through mini sites like this. We hope you find the site helpful.
Please feel free to comment if you can add help to this page or point out issues and solutions you have found, but please note that we do not provide support on this site. If you need help with a problem please use one of the many online forums.

Comments

Your email address will not be published. Required fields are marked *